diff -urN linux-2.6.17-rc4-mm1.orig/arch/i386/kernel/cpu/mtrr/Makefile linux-2.6.17-rc4-mm1/arch/i386/kernel/cpu/mtrr/Makefile
--- linux-2.6.17-rc4-mm1.orig/arch/i386/kernel/cpu/mtrr/Makefile	2006-05-15 15:47:42.000000000 +0000
+++ linux-2.6.17-rc4-mm1/arch/i386/kernel/cpu/mtrr/Makefile	2006-05-15 19:29:52.970976000 +0000
@@ -1,5 +1,5 @@
 obj-y		:= main.o if.o generic.o state.o
-obj-y		+= amd.o
-obj-y		+= cyrix.o
-obj-y		+= centaur.o
+obj-$(CONFIG_CPU_SUP_AMD)	+= amd.o
+obj-$(CONFIG_CPU_SUP_CYRIX)	+= cyrix.o
+obj-$(CONFIG_CPU_SUP_CENTAUR)	+= centaur.o
 
diff -urN linux-2.6.17-rc4-mm1.orig/arch/i386/kernel/cpu/mtrr/cyrix.c linux-2.6.17-rc4-mm1/arch/i386/kernel/cpu/mtrr/cyrix.c
--- linux-2.6.17-rc4-mm1.orig/arch/i386/kernel/cpu/mtrr/cyrix.c	2006-05-15 15:47:42.000000000 +0000
+++ linux-2.6.17-rc4-mm1/arch/i386/kernel/cpu/mtrr/cyrix.c	2006-05-15 19:29:52.978976500 +0000
@@ -5,7 +5,7 @@
 #include <asm/io.h>
 #include "mtrr.h"
 
-int arr3_protected;
+extern int arr3_protected;
 
 static void
 cyrix_get_arr(unsigned int reg, unsigned long *base,
diff -urN linux-2.6.17-rc4-mm1.orig/arch/i386/kernel/cpu/mtrr/main.c linux-2.6.17-rc4-mm1/arch/i386/kernel/cpu/mtrr/main.c
--- linux-2.6.17-rc4-mm1.orig/arch/i386/kernel/cpu/mtrr/main.c	2006-05-15 15:47:42.000000000 +0000
+++ linux-2.6.17-rc4-mm1/arch/i386/kernel/cpu/mtrr/main.c	2006-05-15 19:29:52.986977000 +0000
@@ -59,7 +59,7 @@
 static void set_mtrr(unsigned int reg, unsigned long base,
 		     unsigned long size, mtrr_type type);
 
-extern int arr3_protected;
+int arr3_protected;
 
 void set_mtrr_ops(struct mtrr_ops * ops)
 {
@@ -544,9 +544,15 @@
 
 static void __init init_ifs(void)
 {
+#ifdef CONFIG_CPU_SUP_AMD
 	amd_init_mtrr();
+#endif
+#ifdef CONFIG_CPU_SUP_CYRIX
 	cyrix_init_mtrr();
+#endif
+#ifdef CONFIG_CPU_SUP_CENTAUR
 	centaur_init_mtrr();
+#endif
 }
 
 /* The suspend/resume methods are only for CPU without MTRR. CPU using generic
@@ -644,6 +650,7 @@
 		}
 	} else {
 		switch (boot_cpu_data.x86_vendor) {
+#ifdef CONFIG_CPU_SUP_AMD
 		case X86_VENDOR_AMD:
 			if (cpu_has_k6_mtrr) {
 				/* Pre-Athlon (K6) AMD CPU MTRRs */
@@ -652,6 +659,8 @@
 				size_and_mask = 0;
 			}
 			break;
+#endif
+#ifdef CONFIG_CPU_SUP_CENTAUR
 		case X86_VENDOR_CENTAUR:
 			if (cpu_has_centaur_mcr) {
 				mtrr_if = mtrr_ops[X86_VENDOR_CENTAUR];
@@ -659,6 +668,8 @@
 				size_and_mask = 0;
 			}
 			break;
+#endif
+#ifdef CONFIG_CPU_SUP_CYRIX
 		case X86_VENDOR_CYRIX:
 			if (cpu_has_cyrix_arr) {
 				mtrr_if = mtrr_ops[X86_VENDOR_CYRIX];
@@ -666,6 +677,7 @@
 				size_and_mask = 0;
 			}
 			break;
+#endif
 		default:
 			break;
 		}